1. Field of the Invention
This invention relates to a multiplex decoder circuit, and more particularly to a multiplex decoder circuit formed of a distortion-free, double-balanced differential amplifier.
2. Description of the Prior Art
A full-wave coincidence type time division circuit utilizing a double-balanced differential amplifier circuit as shown in FIG. 3 was proposed as a multiplex decoder in FM stereo broadcast receivers. See, for example, demodulators described in U.S. Pat. No. 3,573,382 to J. H. Feit, assigned to Motorola Inc. In such multiplex decoders, however, the occurrence of waveform distortion has been the problem. Such a waveform distortion is considered to arise mainly in differential pair transistors Q.sub.5 and Q.sub.6 to the bases of which a stereo composite signal is applied, the transistors Q.sub.5 and Q.sub.6 constituting a so-called signal-injection type amplifier. In the reception of stereo broadcasts, other differential pair transistors Q.sub.1, Q.sub.2, Q.sub.3 and Q.sub.4, supplied with a switching signal of a subcarrier signal, serve as the respective switching elements. More particularly, the bases of the transistors Q.sub.1 and Q.sub.4 are supplied with the same 38 kHz subcarrier but 180 degrees out of phase with that applied to the bases of the transistors Q.sub.2 and Q.sub.3. Further, the collectors of the transistors Q.sub.1 and Q.sub.3 and those of the transistors Q.sub.2 and Q.sub.4 are coupled to each other, respectively and then connected to a supply voltage +V.sub.cc through respective load resistors R.sub.LL and R.sub.LR. Then, the demodulated, stereophonically related left and right channel signals are derived from output terminals OUT L and OUT R connected to the interconnection points of the collectors and the load resistors. The differential pair transistors Q.sub.1, Q.sub.2, Q.sub.3 and Q.sub.4 are switched between the two extreme states; almost zero impedance in the turned-on state and almost infinite impedance in the turned-off state. Thus, there is very little possibility of causing waveform distortion therein. On the other hand, the transistors Q.sub.5 and Q.sub.6 are operated in the intermediate region, i.e., in the active region of their performance characteristics and hence there is a large possibility of causing waveform distortion.
Detailed analysis of the phenomenon revealed the following causes of waveform distortion.
The emitter resistance re of each of the transistors Q.sub.5 and Q.sub.6 is not always constant but is dependent on the emitter current. More particularly, the emitter resistance re and the emitter current IE are in an exponential relation as shown in FIG. 4. Therefore, when a reference point is taken at a small emitter current IE2 by selecting a low base bias voltage, the variation in the emitter resistance re2 with respect to the variation of an A.C. signal iE becomes large. This is a reason for the change in the amplification factor of the transistor with the variation of the input signal and directly leads to waveform distortion. For decreasing such waveform distortion, the biasing point may be shifted to a point IE1 around which the variation .DELTA.re1 of the emitter resistance re is small, i.e., the base bias voltage is high and the emitter current is large. At the present stage, the base bias voltage should be set around 8 to 9 volts for suppressing the waveform distortion below 0.01%, thus requiring a very high supply voltage +V.sub.cc, e.g., 30 volts. In case of using a relatively low supply voltage +V.sub.cc such as 12 volts, such a high base bias voltage, however, is practically unachievable since the output voltage is limited by the supply voltage +V.sub.cc.